J. Kim, C. Torng, S. Srinath, D. Lockhart, and C. Batten . Microarchitectural Mechanisms to Exploit Value Structure in SIMT Architectures . Intl. Symp. on Computer Architecture (ISCA) , June 2013

R. Huang, E. Halberg, and G.E. Suh . Non-race concurrency bug detection through order-sensitive critical sections . Intl. Symp. on Computer Architecture (ISCA) , June 2013

S. Ghose, H. Lee, and J.F. Martínez . Improving memory scheduling via processor-side load criticality information . Intl. Symp. on Computer Architecture (ISCA) , June 2013

J. Mukundan, H. Hunter, K.-H. Kim, J. Stuecheli, and J.F. Martínez . Understanding and mitigating refresh overheads in high-density DDR4 DRAM systems . Intl. Symp. on Computer Architecture (ISCA) , June 2013

R. Karmazin, C. Otero, and R. Manohar . CellTK: Automated Layout for Asynchronous Circuits with Nonstandard Cells . Proceedings of the IEEE International Symposium on Asynchronous Circuits and Systems (ASYNC) , May 2013

S. Longfield and R. Manohar . Inverting Martin Synthesis for Verification . Proceedings of the IEEE International Symposium on Asynchronous Circuits and Systems (ASYNC) , May 2013

J. Mukundan, S. Ghose, R. Karmazin, E. İpek, and J.F. Martínez . Overcoming single-thread performance hurdles in the Core Fusion reconfigurable multicore architecture . Intl. Symp. on Supercomputing (ICS) , June 2012

B. Tang, S. Longfield, S. Bhave, and R. Manohar . A Low Power Asynchronous GPS Baseband Processor . Proceedings of the IEEE International Symposium on Asynchronous Circuits and Systems (ASYNC) , May 2012

J. Mukundan and J.F. Martínez . MORSE: Multi-objective reconfigurable self-optimizing memory scheduler . Intl. Symp. on High-Performance Computer Architecture (HPCA) , February 2012

D. Lo, G. Malysa and G.E. Suh . FlexCache: Field Extensible Cache Controller Architecture Using On-Chip Reconfigurable Fabric . Proceedings of the 21st International Conference on Field Programmable Logic and Applications (FPL) , September 2011

P. Merolla, J. Arthur, F. Akopyan, N. Imam, R. Manohar, D. Modha . A Digital Neurosynaptic Core Using Embedded Crossbar Memory with 45pJ per spike in 45nm . Proceedings of the IEEE Custom Integrated Circuits Conference (CICC) , September 2011

Y. Lee, R. Avizienis, A. Bishara, R. Xia, D. Lockhart, C. Batten, K. Asanovic . Exploring the Tradeoffs between Programmability and Efficiency in Data-Parallel Accelerators . Proceedings of the 38th International Symposium on Computer Architecture (ISCA) , June 2011

W.-K. Yu, R. Huang, S. Xu, S.-E. Wang, E. Kan, and G.E. Suh . SRAM-DRAM Hybrid Memory with Applications to Efficient Register Files in Fine-Grained Multi-Threading . Proceedings of the 38th International Symposium on Computer Architecture (ISCA) , June 2011

N. Michael, M. Nikolov, A. Tang, G.E. Suh, and C. Batten . Analysis of Application-Aware On-Chip Routing under Traffic Uncertainty . Proceedings of the 5th International Symposium on Networks-on-Chip (NOCS) , May 2011

N. Imam and R. Manohar . Address-Event Communication Using Token-Ring Mutual Exclusion . Proceedings of the IEEE International Symposium on Asynchronous Circuits and Systems (ASYNC) , April 2011

M.A. Watkins and D.H. Albonesi . ReMAP: A Reconfigurable Heterogeneous Multicore Architecture . Proceedings of the 43rd International Symposium on Microarchitecture (MICRO) , December 2010

J.A. Winter, D.H. Albonesi, and C.A. Shoemaker . Scalable Thread Scheduling and Global Power Management for Heterogeneous Many-Core Architectures . Proceedings of the 19th International Conference on Parallel Architectures and Compilation Techniques (PACT) , September 2010

R. Huang, and G.E. Suh . IVEC: Off-Chip Memory Integrity Protection for Both Security and Reliability . Proceedings of the 37th International Symposium on Computer Architecture (ISCA) , June 2010

B. Sheikh and R. Manohar . An Operand-Optimized Asynchronous IEEE 754 Double-precision floating-point adder . Proceedings of the IEEE International Symposium on Asynchronous Circuits and Systems (ASYNC) , May 2010

C. Ortega, J. Tse, and R. Manohar . Static Power Reduction Techniques for Asynchronous Circuits . Proceedings of the IEEE International Symposium on Asynchronous Circuits and Systems (ASYNC) , May 2010

R. Huang, D. Deng, and G.E. Suh . Orthrus: Efficient Software Integrity Protection on Multi-Cores . Proceedings of the 15th International Conference on Architectural Support for Programming Languages and Operating Systems (ASPLOS) , March 2010

N. Kırman and J.F. Martínez . An efficient all-optical on-chip interconnect based on oblivious routing . Intl. Conf. on Architectural Support for Programming Languages and Operating Systems (ASPLOS), Pittsburgh, PA , March 2010