Course Schedule
ECE 5750 / CS 5420 - Advanced Computer Architecture
Fall '19
Class presentation (Aug. 23)
No reading assignment
THE MULTICORE
Introduction
Amdahl's Law in the multicore era,
by M. Hill and M. Marty, Tech. Rep. 2008
Cache Coherence
Using cache memory to reduce processor-memory traffic,
by J.R. Goodman, ISCA 1983
A low-overhead coherence solution for multiprocessors with private cache memories,
by M.S. Papamarcos and J.H. Patel, ISCA 1984
An evaluation of directory schemes for cache coherence,
by A. Agarwal et al., ISCA 1988
The SGI Origin: A ccNUMA highly scalable server,
by J. Laudon and D. Lenoski, ISCA 1997
Synchronization
Efficient synchronization primitives for large-scale cache-coherent multiprocessors,
by J.R. Goodman et al., ASPLOS 1989
Memory Consistency
Memory consistency and event ordering in scalable shared-memory multiprocessors,
by K. Gharachorloo et al., ISCA 1990
Two techniques to enhance the performance of memory consistency models,
by K. Gharachorloo et al., ICPP 1991
Interconnection Networks
Virtual-Channel Flow Control,
by W.J. Dally, IEEE TPDS 1992
A new theory of deadlock-free adaptive routing in wormhole networks,
by J. Duato, IEEE TPDS 1993
OS Support
Nov. 26
Scheduling and page migration for multiprocessor compute servers,
by R. Chandra et al., ASPLOS 1994
Midterm
Open notes; no electronic aids allowed
THE CORE
Performance
Characterizing computer performance with a single number,
by J.E. Smith, Comm. of the ACM 1988
Limits of instruction-level parallelism,
by D.W. Wall, DEC WRL TR 1993
Microprocessor Architecture (Nov. 1-3)
HPS, a new microarchitecture: rationale and introduction,
by Y. Patt et al., MICRO 1985
The microarchitecture of superscalar processors,
by J.E. Smith and G.S. Sohi, Proc. of the IEEE 1995
The MIPS R10000 superscalar microprocessor,
by K.C. Yeager, IEEE Micro 1996
The Alpha 21264 microprocessor architecture,
by R.E. Kessler et al., IEEE Micro 1999
Control Flow Speculation
Combining branch predictors,
by S. McFarling, DEC WRL TR 1993
Neural methods for dynamic branch prediction,
by D.A. Jiménez and C. Lin., ACM TOCS 2002
Piecewise linear branch prediction,
by D.A. Jiménez, ISCA 2005
Memory Disambiguation
Memory dependence prediction using store sets,
by G.Z. Chrysos and J.S. Emer, ISCA 1998
ADVANCED TOPICS
Composable Multicores
Core Fusion: Accommodating software diversity in chip multiprocessors,
by E. Ipek et al., ISCA 2007
MorphCore: An energy-efficient microarchitecture for high-performance ILP
and high-throughput TLP,
by Khubaib et al., MICRO 2012
Multicore Memory Scheduling
Parallel application memory scheduling,
by E. Ebrahimi et al., MICRO 2011
Self-optimizing memory controllers: A reinforcement learning approach,
by E. Ipek et al., ISCA 2008
Improving memory scheduling via processor-side load criticality information,
by S. Ghose et al., ISCA 2013
Multicore Resource Management
Coordinated management of multiple resources in chip multiprocessors: A machine learning approach,
by R. Bitirgen et al., MICRO 2008
XChange: A market-based approach to scalable dynamic multi-resource allocation in multicore architectures,
by X. Wang and J. Martínez, HPCA 2015