Course Information

Instructor Prof. Christopher Batten, cb535
Office Hours: 323 Rhodes Hall, Tuesday, 4:30–5:30pm
Lectures 407 Phillips Hall, Tuesday and Thursday, 1:00–2:15pm (until spring break)
Section 225 Upson Hall, Friday, 3:45–4:35pm (until spring break)
Neil H.E. Weste & David M. Harris
"CMOS VLSI Design: A Circuits and Systems Perspective"
4th edition, Addison Wesley, 2010


The field of computer systems can be visualized as a stack of abstraction and implementation layers with application requirements at the top and technology constraints at the bottom. The intermediate layers include devices, circuits, gate-level design, register-transfer-level (RTL) design, microarchitecture, instruction set architecture, compilers, operating systems, programming languages, and algorithms. Computer engineering is usually focused in the middle of this stack spanning circuits to operating systems.

ECE 4750 Computer Architecture is in the middle of this stack and focuses on the fundamentals of designing processors, memories, and networks, and apply this knowledge through a series of lab assignments. Students gradually design, implement, test, and evaluate a simple multicore system capable of running parallel microbenchmarks at the register-transfer level. The lab assignments focus on cycle-level performance (i.e., the impact a technique has on the number of cycles it takes to execute a program). Although ECE 4750 teaches students some basic principles involved in evaluating the cycle time, energy, and area impact of various design decisions, they do not have an opportunity to put this into practice. In addition, the focus of ECE 4750 is firmly on general-purpose subsystems as opposed to application-specific subsystems. At the opposite end of the computer engineering spectrum is ECE 4740 Digital VLSI Design. This course teaches students the fundamentals of digital circuit design, but the scope of these courses is on small custom-designed subsystems involving hundreds of transistors.

This course bridges the gap between computer architecture and digital circuits. Students will learn how to take the RTL designs from ECE 4750 and use automated tools to generate realistic layout. The course will enable students to quantitatively evaluate the cycle time, energy, and area impact of the techniques they learned in ECE 4750. ECE 4750 and this course dovetail nicely together creating a year-long digital design experience for students. By the end of this course, students should be able to:


This course is targeted towards advanced senior undergraduates, M.Eng. students, and first-year Ph.D. students. ECE 4750 is a firm prerequisite for all undergraduates and M.Eng. students. No exceptions will be made. Students are more likely to be successful in this class if they did well in ECE 4750. Ph.D. students with sufficient background in computer architecture may be exempted from this prerequisite requirement with instructor permission. Since ECE 4750 is a prerequisite, students are expected to be very proficient with Linux and the command line, implementing designs using well-structured synthesizable register-transfer-level models, writing test harnesses, and evaluating designs using simulators. Students are expected to be familiar with all of the ECE 4750 lab assignments.

We will be using a combination of both Verilog and Python in the lab assignments and design project. Those students with less experience working with the Verilog hardware description language are strongly encouraged to read Chapter 4 in "Digital Design and Computer Architecture, 2nd edition" by D. M. Harris and S. L. Harris (Morgan Kaufmann, 2012), and/or to review "Verilog HDL: A Guide to Digital Design and Synthesis, 2nd edition" by S. Palnitkar (Prentice Hall, 2003). Students which have never used Python before may want to spend additional time reviewing the textbook titled "Think Python: How to Think Like a Computer Scientist" by A.~B. Downey (Green Tea Press, 2014).

Note that we will cover enough circuits and CAD in this course such that advanced circuit-level or CAD courses are not prerequisites. However, those students that have taken such courses will be able to see how digital circuits are composed into much larger multi-million transistor designs, and how CAD algorithms can be used in practice.

Required Materials

The required textbook for the course is Neil H.E. Weste and David M. Harris, ``CMOS VLSI Design: A Circuits and Systems Perspective, 4th edition,'' Addison Wesley, 2010. Please use the 4th edition, since there have been significant changes compared to earlier editions. This book is available through the Cornell Academic materials Program and the Cornell library. There will be occasional assigned readings from the book, but more importantly this is an excellent book that all serious digital ASIC designers should have on their bookshelf.

Format and Procedures

This course includes a combination of lectures, discussion sections, problem sets, laboratory assignments, a midterm, and a five-week design project. The design project includes a preproposal, weekly meetings, milestone documents, demonstration, and final report. Students are expected to work with a partner on the lab assignments, and in groups of two to three students on the design project. Assessment rubrics for the lab assignments and design project will be distributed early in the semester.

Grading Scheme

Each part or criteria of every assignment is graded on a four-point scale. A score of 4.25 is an A+, 4 roughly corresponds to an A, 3 roughly corresponds to a B, 2 roughly corresponds to a C, and below a 2 roughly corresponds to C- or lower. A score of 4.0 usually indicates that the submitted work demonstrates no misunderstanding (there may be small mistakes, but these mistakes do not indicate a misunderstanding) or there may be a very small misunderstanding that is vastly outweighed by the demonstrated understanding. A score of 3.0 usually indicates that the submitted work demonstrates more understanding than misunderstanding. A score of 2.0 usually indicates that the submitted work demonstrates more misunderstanding than understanding. A score of 1.0 usually indicates that the submitted work is significantly lacking in some way. A score of 4.25 is reserved for when the submitted work is perfect with absolutely no mistakes or is exceptional in some other way.

Total scores are a weighted average of the scores for each part or criteria. Parts or criteria are usually structured to assess a student's understanding according to four kinds of knowledge: basic recall of previously seen concepts, applying concepts in new situations, qualitatively and quantitatively evaluating design alternatives, and creatively implementing new designs; these are ordered in increasing sophistication and thus increasing weight. In almost all cases, scores are awarded for demonstrating understanding and not for effort. Detailed rubrics for all assignments are provided once the assignment has been graded to enable students to easily see how the score was awarded. For lab assignments, a detailed Lab Assignment Assessment Rubric will be available on Canvas.

The final grade is calculated using a weighted average of all assignments with the following distribution. Note that the design project as a whole is worth roughly half of the final grade. If you are not willing to put a significant amount of work into this course after spring break, please do not take this course.

Lab Assignment 1 10%
Lab Assignment 2 15%
Midterm 30%
Design Project Milestones 10% (evenly weighted)
Design Project Demonstration 10%
Design Project Report 25%

Note that to pass the course, a student must at a bare minimum satisfy the following requirements: (1) submit at least one lab assignment; (2) take the midterm exam; and (3) submit the design project report. If a student does not satisfy these criteria then that student will fail the course regardless of the student's numerical grade. The instructor reserves the right to award a D letter grade for students who barely satisfy this criteria but are clearly making no real effort to engage in the course and their own learning.


This section outlines various policies concerning usage of cellular phones and laptops in lecture, turning in assignments late, regrading assignments, collaboration, copyright, and accommodations for students with disabilities.

Auditor and Listner Policy

Casual listeners that attend lecture but do not enroll as auditors are not allowed; you must enroll officially as an auditor. Auditors are allowed to enroll in the course as long as there is sufficient capacity in the lecture room. Auditors must attend most of the lectures. If you do not plan on attending the lectures, then please do not audit the course. Please note that students are not allowed to audit the course and then take it for credit in a later year unless there is some kind of truly exceptional circumstance.

Course Re-Enrollment Policy

Students are not allowed to enroll for credit for a significant fraction of the course, drop or switch to auditor status, and then re-enroll for credit in a later year. It is not fair for students to have access to assignment solutions and possibly even take the midterm before deciding to drop the course and take it again in a later year; this would essentially enable students to take the course twice to improve their grade.

Cellular Phones and Laptops in Lecture Policy

Students are prohibited from using cellular phones and laptops in lecture unless they receive explicit permission from the instructor. It is not practical to take notes with a laptop for this course. Students will need to write on the handouts, quickly draw pipeline diagrams, and sketch microarchitectural block diagrams during lecture. The distraction caused by a few students using (or misusing) laptops during lecture far outweighs any benefit. Tablets are allowed as long as they are kept flat and used exclusively for note taking. If you feel that you have a strong case for using a laptop during lecture then please speak with the instructor.

Late Assignment Policy

All written documents must be submitted electronically in PDF format and code must be submitted electronically via GitHub (as explained in the lab handout). No other formats will be accepted! All assignments must be submitted by 11:59pm on the due date unless otherwise specified. No extensions will be granted except for a family or medical emergency. We will be using CMS, an automated online assignment submission system. You can continue to resubmit your files as many times as you would like up until the deadline, so please feel free to upload early and often. If you submit an assignment even one minute past the deadline, the system will automatically mark it as late. There is no grace period. There are no slip-days for this course. You may submit your assignment up to two days late, but your score will be deducted one letter grade (i.e., a full point on the 4.25 scale) for each day the assignment is late.

Regrade Policy

Addition errors in the total score are always applicable for regrades. Regrades concerning the actual solution should be rare and are only permitted when there is a significant error. Please only make regrade requests when the case is strong and a significant number of points are at stake. Regrade requests should be submitted online via a private post on Ed Discussions within one week of when an assignment is returned to the student. You must provide a justification for the regrade request.

Collaboration Policy

The work you submit in this course is expected to be the result of your individual effort only, or in the case of lab assignments and the design project, the result of you and your partner's effort only. Your work should accurately demonstrate your understanding of the material. The use of a computer in no way modifies the standards of academic integrity expected under the University Code.

You are encouraged to study together and to discuss information and concepts covered in lecture with other students. You can give "consulting" help to or receive "consulting" help from other students. Students can also freely discuss basic computing skills or the course infrastructure. However, this permissible cooperation should never involve one student (or lab group) having possession of or observing in detail a copy of all or part of work done by someone else, in the form of an email, an email attachment file, a flash drive, a hard copy, or on a computer screen. Students are not allowed to seek "consulting" help from online forums outside of Cornell University. Students are not allowed to use online solutions (e.g., from Course Hero) from previous offerings of this course. Students are encouraged to seek "consulting" help from their peers and from the course staff via office hours and the online Piazza discussion forums. If a student receives "consulting" help from anyone outside of the course staff, then the student must acknowledge this help on the submitted assignment.

During examinations, you must do your own work. Talking or discussion is not permitted during the examinations, nor may you compare papers, copy from others, or collaborate in any way. Students must not discuss an exam's contents with other students who have not taken the exam. If prior to taking it, you are inadvertently exposed to material in an exam (by whatever means) you must immediately inform the instructor or a TA.

Should a violation of the code of academic integrity occur, then a primary hearing will be held. See for more information about academic integrity proceedings.

Copyright Policy

All course materials produced by the course instructor (including all handouts, tutorials, homeworks, quizzes, exams, videos, scripts, and code) are copyright of the course instructor unless otherwise noted. Download and use of these materials are permitted for individual educational non-commercial purposes only. Redistribution either in part or in whole via both commercial (e.g., Course Hero) or non-commercial (e.g., public website) means requires written permission of the copyright holder.

Accommodations for Students with Disabilities

In compliance with the Cornell University policy and equal access laws, the instructor is available to discuss appropriate academic accommodations that may be required for students with disabilities. Students must register with Student Disability Services (SDS) within the first three weeks of the semester to verify their eligibility for appropriate accommodations. If students register with SDS after the first three weeks of the semester, the instructor may or may not be able to make the appropriate accomodation.

For students with testing accommodations, this course is participating in the SDS Alternative Testing Program. If you have an approved testing accommodation, you must request it for this course and complete an Exam Request Form for the midterm exam via the SDS student portal by February 8th. Failure to do so may result in the inability to use your accommodation.

Note that an accommodated midterm exam will begin at 6:30 p.m. All exam logistics will be communicated to you from SDS (look out for emails from Please note that confirmation about the exact time and room location for your accommodated exam will be communicated to you closer to the exam date (no later than 48 hours prior). All details are being managed by SDS; therefore, questions should be sent to

Coordination of make-up exams (i.e., for students who have been granted prior permission by the instructor to take the exam on a day other than the scheduled date of the main exam) will be handled by the instructor. The SDS Alternative Testing Program will not be involved in the logistics for any make-up exams. If you miss your scheduled accommodated exam, you should notify the instructor, not SDS.

Online and Computing Resources

We will be making use of a variety of online websites and computing resources.